CushionTheBlow (구 BluemoonSoft)

Microelectromechanical systems (MEMS) is the technology of the very small, and merges at the nano-scale into nanoelectromechanical systems (NEMS) and nanotechnology. MEMS are also referred to as micromachines (in Japan), or Micro Systems Technology - MST (in Europe). MEMS are separate and distinct from the hypothetical vision of Molecular nanotechnology or Molecular Electronics. MEMS are made up of components between 1 to 100 micrometers in size (i.e. 0.001 to 0.1 mm) and MEMS devices generally range in size from a 20 micrometers (20 millionth of a meter) to a millimeter (thousandth of a meter). They usually consist of a central unit that processes data, the microprocessor and several components that interact with the outside such as microsensors. At these size scales, the standard constructs of classical physics do not always hold true. Due to MEMS' large surface area to volume ratio, surface effects such as electrostatics and wetting dominate volume effects such as inertia or thermal mass.

The potential of very small machines was appreciated long before the technology existed that could make them?see, for example, Feynman's famous 1959 lecture There's Plenty of Room at the Bottom. MEMS became practical once they could be fabricated using modified semiconductor fabrication technologies, normally used to make electronics. These include molding and plating, wet etching (KOH, TMAH) and dry etching (RIE and DRIE), electro discharge machining (EDM), and other technologies capable of manufacturing very small devices.

Reference:
http://en.wikipedia.org/wiki/MEMS

Smartdust is a hypothetical network of tiny wireless microelectromechanical systems (MEMS) sensors, robots, or devices, installed with wireless communications, that can detect (for example) light, temperature, or vibration.

Reference:
http://en.wikipedia.org/wiki/Smartdust

nesC (network embedded systems C) is a programming language designed to build applications for the TinyOS platform. TinyOS is an operating environment designed to run on distributed embedded Wireless Sensor Networks. nesC is built as an extension to the C programming language with components "wired" together to run applications on TinyOS.

Reference:
http://en.wikipedia.org/wiki/NesC

TinyOS is a free and open source component-based operating system and platform targeting wireless sensor networks (WSNs). TinyOS is an embedded operating system written in the nesC programming language as a set of cooperating tasks and processes. It is intended to be incorporated into smartdust. TinyOS started as a collaboration between the University of California, Berkeley in co-operation with Intel Research, and has since grown to a be an international consortium, the TinyOS Alliance.

Reference:
http://en.wikipedia.org/wiki/Tinyos

Darwin is an open source UNIX computer operating system released by Apple Inc. in 2000. It is composed of code developed by Apple, code derived from NEXTSTEP, and code derived from FreeBSD and other free software projects.

Darwin forms the core set of components upon which Mac OS X and iPhone OS are based. It can also be run as a standalone operating system (although Apple no longer provides a distribution). It is compatible with the Single UNIX Specification version 3 (SUSv3) and POSIX UNIX applications and utilities.

Reference:
http://en.wikipedia.org/wiki/Darwin_%28operating_system%29

A Memory Technology Device (MTD) is a type of embedded flash memory that:

1. Consists of eraseblocks rather than sectors like in hard drives.
2. Eraseblocks are large (32KiB, 128KiB) compared to hard drive's sector size (512 to 1024 bytes).
3. Maintains three main operations - read from eraseblock, write to eraseblock, and erase eraseblock.
4. Bad eraseblocks are not hidden and should be dealt with in software.
5. Eraseblocks get worn-out (i.e., bad and unusable) after about 104-105 erase cycles.

MTD devices are somewhat more difficult to operate than hard drives due to their specific architecture.

Reference:
http://en.wikipedia.org/wiki/Memory_Technology_Device

A page table is the data structure used by a virtual memory system in a computer operating system to store the mapping between virtual addresses and physical addresses. Virtual addresses are those unique to the accessing process. Physical addresses are those unique to the CPU, i.e., RAM.

Reference:
http://en.wikipedia.org/wiki/Page_table

A Translation lookaside buffer (TLB) is a CPU cache that is used by memory management hardware to improve the speed of virtual address translation. All current desktop and server processors (such as x86) use a TLB. A TLB has a fixed number of slots containing page table entries, which map virtual addresses onto physical addresses. It is typically a content-addressable memory (CAM), in which the search key is the virtual address and the search result is a physical address. If the requested address is present in the TLB, the CAM search yields a match very quickly, after which the physical address can be used to access memory. If the requested address is not in the TLB, the translation proceeds using the page table, which is slower to access. Furthermore, the translation takes significantly longer if the translation tables are swapped out into secondary storage, which a few systems allow.

Reference:
http://en.wikipedia.org/wiki/Translation_lookaside_buffer

Content-addressable memory (CAM) is a special type of computer memory used in certain very high speed searching applications. It is also known as associative memory, associative storage, or associative array, although the last term is more often used for a programming data structure. (Hannum et al., 2004)

Reference:
http://en.wikipedia.org/wiki/Content-addressable_memory

A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. The cache is a smaller, faster memory which stores copies of the data from the most frequently used main memory locations. As long as most memory accesses are to cached memory locations, the average latency of memory accesses will be closer to the cache latency than to the latency of main memory.

When the processor wishes to read from or write to a location in main memory, it first checks whether a copy of that data is in the cache. If so, the processor immediately reads from or writes to the cache, which is much faster than reading from or writing to main memory.

The diagram on the right shows two memories. Each location in each memory has a datum (a cache line), which in different designs ranges in size from 8 to 512 bytes. The size of the cache line is usually larger than the size of the usual access requested by a CPU instruction, which ranges from 1 to 16 bytes. Each location in each memory also has an index, which is a unique number used to refer to that location. The index for a location in main memory is called an address. Each location in the cache has a tag which contains the index of the datum in main memory which has been cached. In a CPU's data cache these entries are called cache lines or cache blocks.

Most modern desktop and server CPUs have at least three independent caches: an instruction cache to speed up executable instruction fetch, a data cache to speed up data fetch and store, and a translation lookaside buffer used to speed up virtual-to-physical address translation for both executable instructions and data.

However, of all microprocessor units sold (including embedded processors), most of them do not have any cache -- mostly to reduce cost, but sometimes to improve the determinism of a real-time computing system.

Reference:
http://en.wikipedia.org/wiki/CPU_cache